Current Issue

October 2016, Volume 2, Number 4

A 2.4 GHZ Fully Integrated LC VCO Design Using 130 NM CMOS Technology 
Gaurav Haramkar1, Rohita P. Patil1 and Renuka Andankar2, 1University of Pune, India and 2SM Technologies Pvt. Ltd,

July 2016, Volume 2, Number 3

One Bit 8T Full Adder Circuit Using 3T XOR Gate and One Multiplexer 
Priyanka Rathore and Bhavana Jharia, Ujjain Engineering College, India

April 2016, Volume 2, Number 2

Analysis and Simulation of Dynamic Comparator Using 180nm and 90nm Technology 
Ratansang S Vaghela and Priyesh P. Ghandhi, LCIT, India

A Novel Architecture for Different DSP Applications Using Field Programmable Gate Array 
Arindam Biswas, Sankalpa Kumar, Tamal Dutta, Swati Bhaumik and Rounak Das, Neotia Institute of Technology, India

January 2016, Volume 2, Number 1

Keeper Designs for Wide Fan in Dynamic Logic 
Sarthak Bhuva and Praneeta Kalsait, VJTI, India

Design and Implementation of a New PWM Based Active Impedance Power Factor Correction (AIPFC) 
S. Ali Al-Mawsawi, University of Bahrain, Kingdom of Bahraina